PIC18F4450T-I/ML【PDF 93/241 页】IC PIC MCU FLASH 8KX16 44QFN

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182

XMEGA A [MANUAL]

8077I–AVR–11/2012

Bit 3 – Reserved

This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this

Bit 2 – FDMODE: Fault Detection Restart Mode

This bit sets the fault protection restart mode. When this bit is cleared, latched mode is used, and when it is set, cycle-by-

cycle mode is used.

In latched mode, the waveform output will remain in the fault state until the fault condition is no longer active and the FDF

has been cleared by software. When both conditions are met, the waveform output will return to normal operation at the

next UPDATE condition.

In cycle-by-cycle mode, the waveform output will remain in the fault state until the fault condition is no longer active.

When this condition is met, the waveform output will return to normal operation at the next UPDATE condition.

Bit 1:0 – FDACT[1:0]: Fault Detection Action

These bits define the action performed, according to Table 15-1, when a fault condition is detected.

Table 15-1. Fault actions.

15.7.4 STATUS – Status register

Bit 7:3 – Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero

when this register is written.

Bit 2 – FDF: Fault Detect Flag

This flag is set when a fault detect condition is detected; i.e., when an event is detected on one of the event channels

enabled by FDEVMASK. This flag is cleared by writing a one to its bit location.

Bit 1 – DTHSBUFV: Dead-time High Side Buffer Valid

If this bit is set, the corresponding DT buffer is written and contains valid data that will be copied into the DTLS register on

the next UPDATE condition. If this bit is zero, no action will be taken. The connected timer/counter unit’s lock update

(LUPD) flag also affects the update for dead-time buffers.

Bit 0 – DTLSBUFV: Dead-time Low Side Buffer Valid

If this bit is set, the corresponding DT buffer is written and contains valid data that will be copied into the DTHS register

on the next UPDATE condition. If this bit is zero, no action will be taken. The connected timer/counter unit's lock update

(LUPD) flag also affects the update for dead-time buffers.

FDACT[1:0]

Group configuration

Description

NONE

None (fault protection disabled)

–

Reserved

–

Reserved

CLEARDIR

Clear all direction (DIR) bits which correspond to the enabled DTI

channel(s); i.e., tri-state the outputs

Bit

765

+0x04

–

FDF

DTHSBUFV

DTLSBUFV

Read/Write

R/W

Initial Value

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